A complete list of all of the possible System Controller error messages is provided in Tables C-1 through C-4.
Table C-1. Power-On Errors and Fault Identification
Error Message | Failure Area/Possible Solution |
|---|---|
EBUS TEST 2 FAILED! | This comprehensive test of the Ebus indicates probable failure of the CPU board or a fault on the system midplane/backplane. |
PD CACHE FAILED! | The primary data cache on the bootmaster microprocessor has failed. |
NO IO4 FOUND! | No IO4 is seen during the system probe. Check for bent pins, reseat the IO4, or replace the IO4. A backplane problem is also possible. |
NO IO4 UART FOUND! | IO4 probably bad. |
MASTER IO4 FAILED! | IO4 probably bad. |
IO4 UART FAILED! | IO4 probably bad. |
INIT INV FAILED! | IO4 probably bad. |
NO MC3 FOUND! | No MC3 was found during the system probe. Check for bent pins, reseat the MC3, or replace it. A backplane problem is also possible. |
MC3 CONFIG FAILED! | The system MC3 has failed. If there is more than one MC3 present, there is a potential Ebus or CPU board problem (if system uses a single CPU). Check system voltages with the System Controller. If voltages are out of range, swap out power board or OLS. |
BUS TAGS FAILED! | There is a problem with the CPU board. |
SCACHE FAILED! | The secondary cache on the bootmaster microprocessor failed. The SCACHE SIMM module is bad or the IP19 is faulty. |
PROM DNLOAD FAILED! | The IO4 or MC3 path is blocked. A possible fault exists on the IO4's flash PROM. Check for bent pins and reseat the IO4(s) and MC3(s). |
GRAPHICS FAILED! | The graphics self tests failed. Check individual graphics boards with console/laptop. |
CONSOLE FAILED! | Check the console terminal configuration and cabling. Check the IO4 to I/O panel cable connection. There may be a fault in the IO4. |
Table C-2. System Error Messages
Error Message | Error Meaning |
|---|---|
1.5VDC HIGH FAULT | The system backplane 1.5-volt DC power source exceeded the upper tolerance limit. |
1.5VDC LOW FAULT | The system backplane 1.5-volt DC power source dropped below the allowed limit. |
12VDC HIGH FAULT | The system backplane 12-volt DC power source exceeded the upper tolerance limit. |
12VDC LOW FAULT | The system backplane 12-volt DC power source dropped below the allowed limit. |
48VDC HIGH FAULT | The system backplane 48-volt DC power source exceeded the upper tolerance limit. |
48VDC LOW FAULT | The system backplane 48-volt DC power source dropped below the allowed limit. |
5VDC HIGH FAULT | The system backplane 5-volt DC power source exceeded the upper tolerance limit. |
5VDC LOW FAULT | The system backplane 5-volt DC power source dropped below the allowed limit. |
–12VDC HIGH FAULT | The system backplane –12-volt DC power source exceeded the upper tolerance limit . |
–12VDC LOW FAULT | The system backplane –12-volt DC power source dropped below the allowed limit. |
–5.2VDC HIGH FAULT | The system backplane –5.2-volt power source exceeded the upper tolerance limit . |
–5.2VDCLOW FAULT | The system backplane –5.2-volt power source dropped below the allowed limit. |
AMBIENT OVER TEMP | The incoming ambient air temperature is too high to provide proper system cooling. |
BLOWER A FAILURE | The system A blower fan has failed. |
BLOWER B FAILURE | The system B blower fan has failed. |
BOOT ERROR | A system processor failed to respond to the System Controller during boot arbitration. |
BRD/CHASSIS OVER TEMP | A detector in the cardcage or chassis sensed a temperature over the allowed limit. |
CPU NOT RESPONDING | The CPU system master is not responding to requests transmitted over the serial link. |
INVALID CPU COMMAND | The System Controller received an invalid CPU command from a system processor. |
NO SYSTEM CLOCK | The system backplane clock has failed. |
POKA FAIL | Power ok A (POKA); a voltage source supporting the Power Enable A signal failed. |
POKB FAIL | Power ok B (POKB); a voltage source supporting the Power Enable B signal failed. |
POKC FAIL | Power ok C (POKC); a voltage source supporting the Power Enable C signal failed. |
POKD FAIL | Power ok D (POKD); a voltage source supporting the Power Enable D signal failed. |
POKE FAIL | Power ok E (POKE); a voltage source supporting the Power Enable E signal failed. |
Table C-3. System Event Messages
Error Message | Error Meaning |
|---|---|
SCLR DETECTED | The System Controller detected an SCLR (system clear) on the system backplane. The reset was initiated from the System Controller front panel by an operator. |
SYSTEM OFF | The key switch was turned to the Off position and the System Controller powered off the system. |
SYSTEM ON | The System Controller has successfully powered on the system. |
SYSTEM RESET | The System Controller detected an SCLR and initiated a system boot arbitration process. SCLR can be generated by any processor board or by the System Controller. |
Table C-4. Internal System Controller Error Messages
Error Message | Error Meaning |
|---|---|
BAD ALARM TYPE | The firmware attempted to send an invalid alarm to the CPU. |
BAD MSG: CPU PROCESS | The CPU or System Controller process received an invalid message. |
BAD MSG: DISPLAY | The display process received an invalid message. |
BAD MSG: POK CHK | The power ok check process received an invalid message. |
BAD MSG: SEQUENCER | The sequencer process received an invalid message. |
BAD MSG: SYS MON | The system monitor process received an invalid message. |
BAD WARNING/ALARM | The routine that decodes alarm and warning messages detected an invalid message. |
BAD WARNING TYPE | The firmware attempted to send an invalid warning to the CPU. |
COP FAILURE | The Computer Operating Properly (COP) timer exceeded time limits. The System Controller firmware must write to a COP timer port before it times out. If the firmware exceeds the time allowed between writes to a COP port, an interrupt is generated. The System Controller firmware may have entered an endless loop. |
COP MONITOR FAILURE | A Computer Operating Properly (COP) clock monitor failure was detected. The System Controller clock oscillator is operating at less than 10 KHz. |
DEBUG SWITCH ERROR | The System Controller detected data corruption in the nonvolatile RAM debug switch location. |
FP CONTROLLER FAULT | An error was detected in the front panel LCD screen control process. |
FP READ FAULT | A read of the front panel status register did not complete successfully. |
FREE MSG NODE ERROR | The free message node queue overflowed. |
FREE TCB NODE ERROR | The free timer control block queue overflowed. |
ILLEGAL OPCODE TRAP | The System Controller's microprocessor tried to execute an illegal instruction, probably because of a stack overrun followed by a process switch. |
PULSE ACCU INPUT | An interrupt was detected on the pulse accumulator input port. The port is not used and an interrupt is treated as an error. |
PULSE ACCU OVERFLOW | The pulse accumulator overflow port received an interrupt. This port is unused and the interrupt is treated as an error. |
SPI TRANSFER | An interrupt was detected on the synchronous serial peripheral interface. This interface is not supported and the interrupt is treated as an error. |
STACK FAULT PID 0–6 | One of the seven stack areas used by a System Controller process overflowed its assigned boundaries. |
TEMP SENSOR FAILURE | The System Controller detected an invalid measurement from the temperature sensor. |
TIMER IN COMP 1 | The timer input compare port received an interrupt. The port is not used and the interrupt is treated as an error. |
TIMER OUT COMP 1–5 | One of the five timer output compare ports received an interrupt. The port is not supported and the interrupt is treated as an error. |
XMITTER 1 TIMEOUT | The System Controller's first UART experienced a failure. |
XMITTER 2 TIMEOUT | The System Controller's second UART experienced a failure. |