The XIO bus gives a widget either a memory view or an I/O view of the Origin2000 system. The XIO_Address[47] bit selects the type of view (I/O, memory) seen by the widget.
If XIO_Address[47] is set, the XIO accesses the I/O view. This view is primarily
designed to allow access to the Hub interrupt registers.If XIO_Address[47] is cleared, the XIO accesses the memory view.
In normal operation, DMA operations use the memory view.
The XIO memory view is similar to the memory address map available to a processor, in that XIO's 40-bit memory space is divided into equal regions per node. The Hub ignores A[46:40] in the memory view, effectively creating an alias space with these bits.
The M Mode address map for the XIO memory view is shown in Figure 4-1.
M Mode memory view address mappings are shown in Figure 4-2. XIO_Address[47] is always set to a 0, indicating a memory view.
The XIO's IO view of the Origin2000 system is slightly different from the XIO memory view. The 9-bit NASID is merged with XIO_Address[46:38]. [3] This means the 4-GB Hub region occurs somewhere within a 256 GB space.
The Hub region is indexed by the sum of NodeID plus XIO_Address[46:38], and offset is XIO_Address[31:0], as is shown in Figure 4-3.
A series of Hub regions within their encompassing 256 GB spaces are shown in Figure 4-5.
As shown in Figure 4-4, the Hub ignores XIO_Address[37:32]. XIO_Address[47] is always set to a 1, indicating an IO view, as shown in this figure.
The remainder of the XIO address is similar to the memory view model, which means the view within a node is similar to the processor's view of memory, as shown in Figure 4-5.
