This chapter describes the Silicon Graphics 750 system baseboard, processor board, memory board, and I/O board in the following sections:
The architecture of the Silicon Graphics 750 system supports symmetrical multiprocessing (SMP). The system board set consists of:
Baseboard
Seven PCI expansion slots (five 64-bit, 66-MHz and two 64-bit, 33-MHz)
AGP Pro 110 slot
Processor board connector
Two memory expansion card connectors
Integrated voltage regulators
Processor board
Two Intel Itanium processor LIF sockets
ITP connector
Memory board
Two memory expansion cards (MECs)
Eight DIMM sockets on each MEC
Each MEC supports up to 2 GB of PC100 SDRAM (planned future support for up to 8 GB per MEC)
Memory DC-DC converters
I/O board
ATA-33 IDE (primary and secondary channels)
USB (dual port)
Front panel connectors (audio and USB)
LAN (10/100 Mbps)
PS/2 (keyboard and mouse)
Audio
9-pin serial
Table 2-1 describes the board set features.
Feature | Description |
|---|---|
Baseboard | The baseboard provides the interface for the processor board, memory expansion cards, I/O board, PCI peripherals, and AGP Pro devices. |
Processor board | The processor board can support a maximum of two Intel Itanium processors, two processor power pods, and an ITP connector. An add-in bus terminator is not required for single-processor configurations. |
Memory expansion cards | Two plug-in expansion cards supporting PC100 registered SDRAM containing interleaved pathways to main memory. Each memory card supports from 256 MB to 8 GB (in the future) of error correction code (ECC) memory using eight 72-bit dual inline memory modules (DIMMs). These modules interface to the baseboard through 300-pin connectors. |
I/O board | The I/O board plugs into the SC242 connector at the left side of the baseboard (PCI connectors oriented top). |
| The ATA-33 Integrated Drive Electronics (IDE) interface supports one primary and one secondary IDE channel. |
| The following connectors are on the rear panel: |
Front panel | Audio and USB ports Push-button power switch LEDs indicate power and hard drive activity |
The Intel Itanium processor is the first in a family of high-performance 64-bit processors. Intel's 64-bit Instruction Set Architecture (ISA) is referred to as Intel Itanium architecture. The Itanium processor maintains full compatibility with Intel's current 32-bit Intel Architecture processor family while delivering industry-leading performance beyond existing architectures. Each Intel Itanium processor is packaged in a PAC418 (418-pin array cartridge) format. The cartridge includes:
Processor core
L1 instruction cache (16 KB, on die)
L1 data cache (16 KB, on die)
Unified L2 cache (96 KB, on die)
Unified L3 cache (2 MB or 4 MB)
Thermal plate
Note: Each processor implements the MMX™ and SSE (streaming SIMD extensions) technology.
The main memory resides on two add-in boards called memory expansion cards (MECs). Each MEC contains sockets for eight DIMMs and two power connectors for DC-DC converters. Each MEC is attached to the baseboard through a 300-pin connector. The memory controller supports PC100 registered SDRAM DIMMs. The memory sub-system can operate in two different modes.
Interleaved mode (two MECs installed): This configuration offers the highest performance by dividing the total system RAM between two MECs. This reduces the probability of wait states, thus increasing speed on sequential accesses.
Note: To operate in interleaved mode, both MECs must be used, and at least the top four DIMM sockets must be populated on each MEC. Single-port mode (one MEC installed): The single MEC responds to all memory addresses.
Note: Silicon Graphics 750 systems ship with two MECs standard.
The baseboard has two 64-bit, 66-MHz PCI buses and one 64-bit, 33-MHz PCI bus.
The WXB (Wide eXpansion Bridge) PCI bus 1 provides PCI slots 1, 2, and S2.
The WXB (Wide eXpansion Bridge) PCI bus 2 provides PCI slots 3 and 4.
The PXB (PCI eXpansion Bridge) PCI bus 0 provides PCI slots 5, 6, and IFB.
The IFB controls communications to IDE, USB, and Super I/O.
Note: In order for the system to remain EMC compliant, peripheral devices having an external output connector (for example, audio, video, SCSI) must be marked as FCC tested for home or office use (FCC Class B), and marked as Canada ICES-003 Class B compliant. For European installations, these devices are required to be CE marked with declaration of conformity to the EMC directives (89/336/EEC).
The Silicon Graphics 750 baseboard provides support for AGP Pro 110 (4x at 66 MHz) for high-end graphics capability.
An ATI XPERT 2000 PRO AGP (4x-capable) add-in AGP video adapter, using the ATI RAGE 128 Pro™ graphics engine, provides video for the system.
The I/O board supports integrated 10/100 Mbps LAN support (using the Intel 82559 Fast Ethernet controller). An RJ45 connector accessible via the rear I/O panel is provided for this purpose.
The Silicon Graphics 750 includes one QLogic 12160 PCI-based dual-channel SCSI Host Bus Adapter (HBA). This adapter is capable of Ultra3 Low Voltage Differential (LVD) data transfers at up to 160 MB/sec. or Single-Ended (SE) data transfers at up to 40 MB/sec. on each of its two SCSI buses (these values are for wide devices — narrow devices can operate at speeds up to half those listed).
When a single-ended device is connected to one of the two SCSI buses on the QLogic 12160 board, that entire bus is limited to single-ended speeds (that is, 40 MB/sec.).
If an external SCSI device is used on either of the two SCSI buses, that bus should be terminated with a multi-mode terminator, supporting both LVD and SE operation.
| Note: When a bus is operating in single-ended mode, the total internal and external cable length of that bus must be no more than 1.5 meters. Any external SCSI device on a single-ended bus must therefore be located very close to the Silicon Graphics 750 chassis, and should use the shortest cable practical. SGI therefore recommends the use of 0.5-meter cables for external single-ended devices. |
IDE is a 16-bit interface for integrated disk drives with AT disk controller electronics on board. The IFB (I/O and firmware bridge) is a multifunction device on the I/O board that acts as a PCI-based Fast IDE controller. The device controls: